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Re: 當輸出port為1時,如何將準位拉至10V?
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版主
 
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PIC 外部 I/O 腳電壓 Hi 時不可高過 Vdd+0.6V，Low 時部要低於 Vss-0.6V，超果此範圍 PIC I/O 腳內的 ESD 保護二極體就有可能被打穿，造成 EOS Damage.
所以 10V 一定要用外接零件的方式。
發表於: 2008/12/17 17:07
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Re: 當輸出port為1時,如何將準位拉至10V?
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資深會員
 
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加電晶體
發表於: 2008/12/17 11:52
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當輸出port為1時,如何將準位拉至10V?
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新會員
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當0:接地0V
當1:需要為10V 有什麼簡單電路可以實現嗎?
發表於: 2008/12/17 9:43
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