在此 Data Sheet 6.8.3 FRC Oscillator with PLL Mode (FRCPLL) 有提到,詳看底下之說明: The output of the FRC postscaler block may also be combined with the 4x PLL to produce a nominal system clock of either 16 MHz or 32 MHz. Although somewhat less precise in frequency than using the Primary Oscillator with a crystal or resonator, it still allows high-speed operation of the device without the use of external oscillator components. The FRCPLL mode is selected whenever the COSC bits are ‘001’. In addition, this mode only functions when the direct or divide-by-2 FRC postscaler options are selected (RCDIV2:RCDIV0 = 000 or 001).
所以設定需為: COSC2:COSC0: Current Oscillator Selection bits 設定成 : 001 = Fast RC Oscillator with PLL module via Postscaler (FRCPLL)