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Re: 24FJ64GA004 I2C errata
#2
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我用24FJ128GA008在相同的I2C code 就無bus 碰撞問題,我不知24FJ64GA004 系列在I2C介面到底能用否?板子都洗下去了,

發表於: 2008/10/13 20:01
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24FJ64GA004 I2C errata
#1
新會員
新會員


查看用戶資訊
在 errata 中提到使用I2C1須軟硬體修正,我改了之後可正常working,但隔天軟件沒改硬件也沒動,但bus collision卻又一直發生了,有人跟我遇到相同問題嗎?要如何解決24FJ64GA004 I2C1的電容效應?

我RB9一開始已設成OutPut,且清為0
在SDA1也加一顆C 下地


In Master mode, this error may cause a bus collision
to occur instead of a Start bit transmission.
Transmissions after the SDA1 pin has been held
low will occur correctly.
Work around
Using an external device or another I/O pin from
the microcontroller, drive the SDA1 pin low.
If no external devices or additional I/O pins are
available, it is sometimes possible to perform the
work around internally, using the following steps:
• With the module in Master mode, configure the
RB9 pin as an output;
• Clear the LATB9 bit (for the default I2C1
assignment) or LATB5 (for the alternate I2C1
assignment) to drive the pin low;
• Enable I2C1 by setting the I2CEN bit
(I2C1CON<15>).
Note that this action could appear to be a Start bit
to an I2C slave device on the bus if the RB8/SCL1
pin is not driven low prior to driving RB9/SDA1 low.
It may be necessary to add additional capacitance
to the SDA1 bus in order to maintain the low logic
level long enough for the module to detect the low
logic level. Make sure that when adding capacitance,
that the application does not violate the I2C
timing specifications.

發表於: 2008/10/10 12:39

Edited by chingjau on 2008年10月10日 13:10:39
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